Understatement of the year but I respect the PCI-SIGs commitment to straight up double it every 2-3 years and eat shit until it somehow works.
=> More informations about this toot | More toots from timonsku@mastodon.social
@timonsku excited for pcie 9.0 to be PAM8 and require in-cpu silicon photonics
=> More informations about this toot | More toots from artemist@mildlyfunctional.gay
@artemist @timonsku it probably actually will be PAM8 or higher by then lol
=> More informations about this toot | More toots from gsuberland@chaos.social
@gsuberland @timonsku should have gone with pcie 10.0 being QAM8192
=> More informations about this toot | More toots from artemist@mildlyfunctional.gay
@artemist @timonsku :D
by PCIe 10.0-ish I wouldn't be surprised if the photonics stuff comes true - it's certainly the direction Intel is planning to go for switch ASICs due to the lower per-bit energy usage opening a lot of doors.
https://chaos.social/@gsuberland/112413065595797958
=> More informations about this toot | More toots from gsuberland@chaos.social
@gsuberland @artemist @timonsku intel has switch plans?
=> More informations about this toot | More toots from erincandescent@erincandescent.net
@erincandescent @gsuberland @timonsku @artemist i mean there was Tofino etc but i thought that was a dead end they weren't planning to continue? Did that change?
=> More informations about this toot | More toots from azonenberg@ioc.exchange
@azonenberg @erincandescent @timonsku @artemist sorry, misremembered that it was switch ASICs, looks like it was just PHYs and such.
=> More informations about this toot | More toots from gsuberland@chaos.social
@gsuberland @timonsku at the very least they're going to have to abandon the traditional PCIe slot soon, there's only so much you can reduce its stubs
=> More informations about this toot | More toots from artemist@mildlyfunctional.gay
@artemist @timonsku yeah on DDR5 they're already doing stub-elimination on connectors, it's definitely going to start hurting PCIe too
=> More informations about this toot | More toots from gsuberland@chaos.social
@gsuberland @artemist @timonsku VCSEL with TSVs mounted on top of the logic die or adjacent to it on an interposer?
=> More informations about this toot | More toots from azonenberg@ioc.exchange
@gsuberland @artemist @timonsku I'm wondering about a hybrid electrical optical setup like toslink shared with 3.5mm audio uses. Something that's able to carry nrz and maybe pam4 for link startup then transition to optical over the same connector.
=> More informations about this toot | More toots from azonenberg@ioc.exchange
@azonenberg @artemist @timonsku yeah either CPO VCSEL mounted off to the side, or integrated photonics with some sort of focusing lens arrangement to deal with the off-axis mechanical stuff. (I think for now we're mostly still on CPO + alignment assembly for transceivers at least)
=> More informations about this toot | More toots from gsuberland@chaos.social
@gsuberland @artemist @timonsku eventually stop treating the PC as a CPU as a breakout board and switch to the PC being a GPU breakout board. CPU slot cards are coming back
=> More informations about this toot | More toots from xssfox@cloudisland.nz
@xssfox @gsuberland @artemist @timonsku I found a PC at work the other day that had this. I am young enough that it confused me quite a bit.
“No wonder it’s not working, there’s no CPU in here!” Lol
=> More informations about this toot | More toots from duckyfella@cupoftea.social
@timonsku I've got to wonder when they will abandon that huge 1 mm pitch card edge. The fingers are about 2 UI long at that 64 Gsymbol/s rate.
Twinax cables like M-XIO would be so much nicer for GPU thermal and mechanical too.
=> More informations about this toot | More toots from dlharmon@chaos.social
@dlharmon @timonsku yeah I keep saying they need to move to the twinax / ribbon stuff they're using on servers. the mass of the peripheral cards has gone through the roof, the thermal demands are poorly suited for the location and form factor.
=> More informations about this toot | More toots from gsuberland@chaos.social
@timonsku board fabs losing their minds as PCIe products start requiring nanometer-tolerance electron beam polished copper foil to keep the roughness factor down
=> More informations about this toot | More toots from gsuberland@chaos.social This content has been proxied by September (3851b).Proxy Information
text/gemini