Ugh. This is the simplest piece of MIPI - output only. I was surprised not to find a massive change in the bits of the #fpga image, but it seems to have dawned on me - these chips don't have this clutter of IOs, instead they use the usual standard LVDS output, which on signal splits into two IOs and on signal can reassemble back into a differential port.
It's clever.😜
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