Verilog is poison
@acqrel had this experience recently, and it certainly isn't the first time <10 LOC of Verilog has taken out a Spade project that otherwise would have worked on the first attempt.
Luckily, I think @ethan's recent changes make it possible to instantiate PLLs directly in Spade without needing a Verilog shim, just a stub
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text/gemini
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