Hmm, spurs, spurs, what is your origin?
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So I figured out the spurs were at 519Hz intervals (target frequency/8) for some reason. So I tried 4000Hz and got the included plot.
I'm glad I didn't get this first or I might have just moved on.
So this suggests what I'm seeing is "spectral leakage" which is an FFT artifact from the FFT assuming the signal you're looking at is just this repeating over and over and over. The Harris window I use should tamp that down but it may be a red herring.
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At a sample rate of 96kHz, each "cycle" at 4152 Hz, is 23.121 samples. You can only do integer samples. And 0/0.121 is 8. At 4000 Hz there are exactly 24 samples per cycles. The former has spurs in the FFT at Tone Frequency / 8, the second has no spurs.
As a result, rather than having the last sample used in the FFT being equivalent to the one before the first sample, its somewhere in the middle. And THAT is what the FFT is seeing.
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At which point I think I'm ready to generate a bitstream and upload it to the FPGA and debug my use of the DSP blocks 😃
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One thing I remain curious about, is how the fractional step will show up in the final signal. I could accumulate error and inject a 0 sample whenever it exceeded 1. That shows up as phase noise but might make for cleaner spectrum?
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Okay then, while I kludged it in via the data (I haven't figured out how I'm going to write the verilog for it yet, injecting the 0 into the data stream does clean up the spectrum on the FFT. Will make it controllable by a switch on the design so I can look on my spectrum analyzer to see how this plays out.
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And for the record, this plot is exactly what I expected when I first did this, a higher and "noisier" noise floor because of the lower precision but a single peak at the frequency of interest.
EDIT: Important caveat, I had a bug in my munged code, see below.
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And now I'm going to have to correct myself again, because I changed two things at the same time (I thought I was injecting zeros and I changed the number of bins I was using). Turns out my hack to inject zeros never fired, (so I wasn't injecting them). So what now? The wider the FFT (I used 131072 bins to get good resolution at the lower frequencies) the more spectral noise you bring in, the bigger impact. When I fixed it to inject zeros it saw those and kinda went crazy. So ...
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@ChuckMcManis
Or just add a 1/2 bit of random jitter, if that's easier.
Noise is always better than correlated artifacts, n'est ce pas?
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@dougmerritt I thought about dithering it. Adding a zero doesn't add any spectral energy because its way above the nyquist criterion and the output of the DAC is low pass filterable for the Nyquist frequency. But what was worrying me was that the target is channel tuners in an ODFM modulator and I don't want to be throwing random spectrum around which increases ISI.
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@ChuckMcManis
Lower precision isn't guaranteed to look like pure noise -- but so far so good. :)
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@ChuckMcManis What volumes do you recommend to learn about signal processing?
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@ewhac
Lyon's "Understanding DSP" is good, as is "DSP for Scientists and Engineers" (free on line http://www.dspguide.com/pdfbook.htm) I started there and wrote a bunch of code to implement the math and debugged the code which taught me the math. Still has a lot of unplumbed depth 😃 but I can usually pick up a DSP paper and basically understand it now.
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@ChuckMcManis @ewhac The MIT lectures for 6.003 are pretty good, fwiw.
http://ocw.mit.edu/6-003F11
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@Jvmguy @ewhac
Definitely +1 to that lecture series. My challenge was I had all of the lectures in my EE curriculum at USC but it didn't stick. In part because I'm very practice oriented vs theory oriented.
My typical path is read a paper, think "that is all gobbledy-gook!", write some code, munge it, get it working. Go back to the paper "Oh, now I get it, THAT is what they meant." 😆
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@ChuckMcManis Thanks for this. I enjoyed the whole thread.
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