FOSDEM event "The Ides of RISC-V"

Will Hawkins

Type devroom

A vectorized Caesar cipher written in RISC-V assembler and tested in an emulator

Starts on day 1 (2021-02-06) at 16:00 (Brussels time, UTC+1) in room Emulator (duration 00:30)

Matrix room #emulator:fosdem.org

I will demonstrate how to write a vectorized (parallel) Caesar cipher in RISC-V (in assembler) using the project's emulator. Using the emulator is necessary at this point for such an application because the vectorized extension to the RISC-V ISA is not standardized. I will further demonstrate how the emulator itself is able to emulate the execution of a single user-space application when it is actually designed to emulate an entire system. This will involve a demonstration and explanation of riscv-isa-sim, riscv-pk and their interaction.

=> FOSDEM schedule page